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april 2011 doc id 17576 rev 1 1/62 62 STLED325 i2c interfaced, advanced led controller/driver with keyscan, standby power management and real time clock (rtc) features led controller driver with 13 outputs (8 segments/5 digits) standby power management to host integrated low-power, accurate rtc integrated remote control decoding: ? philips (rc5, rcmm) ? thomson (rca, r2000) ? nec and r-step wake-up using front panel keys, remote control, real time clock (rtc), extra pin (av or cec) battery or super-cap back up mode for real time clock (rtc) keyscanning (8x2 matrix) low power consumption in standby mode i 2 c serial bus interface (scl, sda) 16-step dimming circuit to control the display brightness 5.0 v ( 10%) for v cc built-in thermal protection circuit external crystal with inte rnal oscillator for real time clock (rtc) applications set-top boxes white goods home appliances dvd players, vcrs, dvd-r description the STLED325 is a compact led controller/ driver that interfaces microprocessors to led displays through serial i 2 c interface. it drives leds connected in common anode configuration and includes keyscanning for an 8 x 2 key matrix which automatically scans and de-bounces a matrix of up to 16 switches. furthermore, the STLED325 provides standby power management to the host. it also integrates a low-power, highly-accurate rtc and a remote- control decoder. all functions are programmable using the i 2 c bus. low power consumption during standby mode is achieved. the STLED325 controller/driver is ideal as a single peripheral device to interface the front panel display with a single-chip host ic like cpu. qfn32 (5 x 5 mm) table 1. device summary order code temp range ( c) package comments STLED325qtr -40 to +85 c qfn32 250 parts per reel www.st.com
contents STLED325 2/62 doc id 17576 rev 1 contents 1 description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2 functional and application diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3 functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 3.1 low power mode of operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 3.2 i2c serial interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 3.3 initial power up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 3.4 display types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 3.5 keyscan . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 3.6 timers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 3.6.1 guard timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 3.6.2 watchdog timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 3.7 power-on-reset and soft-start . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 3.8 led drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 3.9 over temperature cut-off . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 3.10 standby mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 3.10.1 cold boot up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 3.10.2 entering standby mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 3.10.3 wake-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 3.11 real time clock (rtc) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 3.11.1 reading the real time clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 3.11.2 writing to the real time clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 3.11.3 register table for rtc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 3.11.4 setting alarm clock registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 3.11.5 century bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 3.11.6 initial power-on defaults . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 3.11.7 programmable display . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 3.11.8 lookup table with ppm against the calibration register values . . . . . . . . 24 3.12 remote control decoder . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 3.13 interrupt . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 3.14 ready . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 3.15 mute . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
STLED325 contents doc id 17576 rev 1 3/62 3.16 gpio . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 3.17 power sense circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 3.17.1 switchover . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 3.17.2 battery low warning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 3.17.3 different power operation modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 3.18 bus characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 4 electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 4.1 absolute maximum ratings (ta = 25 c, gnd = 0 v) . . . . . . . . . . . . . . . . 33 4.2 recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 4.2.1 dc electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 4.3 power consumption estimation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 4.4 oscillator and crystal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 4.5 esd performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 5 display ram address and displ ay mode . . . . . . . . . . . . . . . . . . . . . . . 41 6 key matrix and key-input dat a storage ram . . . . . . . . . . . . . . . . . . . . 42 7 commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 7.1 configuration mode setting command . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 7.2 data setting command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 7.3 configuration data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 7.3.1 interrupt flags . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 7.4 address setting command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 7.5 display control and hotkey setting command . . . . . . . . . . . . . . . . . . . . . . 51 7.6 keyscanning and display timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 8 state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 8.1 default state upon power-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 8.2 initial state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 9 remote control protocols . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 10 application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56 10.1 power supply sequencing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
contents STLED325 4/62 doc id 17576 rev 1 10.2 iset variation with rset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56 10.3 application diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 11 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 12 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
STLED325 list of tables doc id 17576 rev 1 5/62 list of tables table 1. device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 table 2. register table for rtc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 table 3. alarm repeat modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 table 4. century bits examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 table 5. initial power-on defaults . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 table 6. rtc display . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 table 7. lut with ppm against the calibration register values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 table 8. different power operation modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 table 9. pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 table 10. absolute maximum ratings (ta = 25 c, gnd = 0 v) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 table 11. thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 table 12. dc electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 table 13. voltage drop estimation with rgb led . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 table 14. capacitance (ta = 25c, f = 1 mhz) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 5 table 15. power supply characteristics (ta = -40 to 85c) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 table 16. dynamic switching characteristics (ta = -40 to +85 c, vcc = 5.0v 10%, gnd=0.0v, typ- ical values are at 25c). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 table 17. timing characteristics (ta = -40 to +85 c, vcc = 5.0 v 10%, gnd=0.0 v, typical values are at 25 c) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 table 18. oscillator characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 table 19. crystal electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 table 20. esd performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 table 21. battery range and battery detect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 table 22. power down/up ac characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 table 23. power down/up trip points dc characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 table 24. thermal shutdown characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 table 25. bit map for segment 1 to segment 8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 table 26. data write command. b5 b4: 00 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 table 27. data write 2 command. b5 b4: 01 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 table 28. data read 1 command. b5 b4: 10 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 7 table 29. data read 2 command. b5 b4: 11 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 7 table 30. power-up defaults . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 table 31. qfn32 (5 x 5 mm) mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 table 32. document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
list of figures STLED325 6/62 doc id 17576 rev 1 list of figures figure 1. functional block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 figure 2. application diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 figure 3. pin configurations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 figure 4. display types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 5. power-up condition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 6. power down condition (normal behavior) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 figure 7. standby condition (normal behavior) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 8. keyscan and digit mapping. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 figure 9. interrupt . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 figure 10. power sense circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 figure 11. circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 figure 12. battery switchover waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 figure 13. power down/up mode ac waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 figure 14. vcc characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 figure 15. key matrix and key-input data st orage ram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 figure 16. data write command (b7 b6) for gpio . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 figure 17. interrupt bit mapping in byte 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 figure 18. interrupt bit mapping in byte 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 figure 19. blanking time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 figure 20. keyscanning and display timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 figure 21. rext versus iseg curve . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56 figure 22. application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 figure 23. qfn32 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59 figure 24. qfn32 carrier tape . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
STLED325 description doc id 17576 rev 1 7/62 1 description the STLED325 is a compact led controller/driver that interfaces microprocessors to led displays through serial i 2 c interface. it drives led connected in common anode con- figuration. the STLED325 drives up to 40 discrete leds in 8 segment/5 digit configuration while functioning from a supply voltage of 5 v. the maximum segment current for the display digits is set through a single external resist or. individual digits may be addressed and updated without rewriting the entire display. additionally it includes keyscanning for an 8 x 2 key matrix which automatically scans and de-b ounces a matrix of up to 16 switches. furthermore, it provides standby power management to the host. the STLED325 also integrates a low-power, highly-accurate rtc and a remote-control decoder. all functions are pro-grammable using the i 2 c bus. low power consumption during standby mode is achieved. STLED325 supports numeric-type displays and reduces the overall bom costs through high integration. also it provides esd protection of greater than 2 kv hbm. the led controller/driver is ideal as a single peripheral device to interface the front panel display with a single-chip host ic like cpu.
functional and application diagram STLED325 8/62 doc id 17576 rev 1 2 functional and application diagram figure 1. functional block diagram am0414 3 v1 2 o s c di s pl a y mem (20 x 16) timing gen key s c a n & dimming 20- b it o u tp u t l a tch 16- b it s hift regi s ter grid driver s s pi s eri a l i/f keyd a t a mem (2 x 12) key1-key2 8 5 (0v) dig4 comm a nd decoder s cl 2 o s c (fixed fre q ) di s pl a y mem (5 x 8 ) timing gen key s c a n & dimming 5- b it s hift regi s ter s egment driver s digit driver s i2c s eri a l i/f keyd a t a mem (2 x 8 ) s eg1/k s 1 comm a nd decoder por & s oft- s t a rt intern a l re s et c u rrent s o u rce i s et o u tp u t s egment s dig1 remote ctrl decoder & therm a l protection s eg 8 /k s8 s da irq_n b a ndg a p a nd uvlo rtc + 3 2khz o s c xin xout rc decoder ir_in s tdby ready gnd volt a ge reg u l a tor vcc dig5 intern a l core su pply vbat wake_up gpio1 gpio2 vreg mute g ua rd timer vcc detect v ba t detect 8 - b it o u tp u t l a tch power m a n a gement
STLED325 functional and application diagram doc id 17576 rev 1 9/62 figure 2. application diagram !-6 microcontroller or cpu key scan (8x2 matrix) scl sda STLED325 xin external 32.768khz crystal xout from remote control sensor ir_in stby iset r 2 key1-key2 seg1/ks1- seg8/ks8 dig1-dig4 irq_n 4 8 led 4-digit 7-segment (+dot-point) display panel pwr stby rec mute dig5 ready wake_up vbat gpio1 gpio2 mute from sensor/to led from sensor/to led connect to external capacitor vreg
functional and application diagram STLED325 10/62 doc id 17576 rev 1 figure 3. pin configurations !-6 sda vcc scl seg1/ks1 dig1 seg6/ks6 seg5/ks5 seg4/ks4 seg3/ks3 seg2/ks2 irq_n seg8/ks8 seg7/ks7 dig3 vbat wake_up stby STLED325 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 xout xin iset dig2 dig4 dig5 ready ir_in gpio2 gpio1 mute vreg key2 key1 gnd
STLED325 functional description doc id 17576 rev 1 11/62 3 functional description the STLED325 is a common anode led driver controller which can be used to drive red, green or blue leds as the current is adjustable through the external resistor. in the common anode configuration, the digit outputs source the current to the anodes while the segment outputs sink the current from the cathodes. the configurable output current can be used to drive leds with different current ratings (red, green or blue). the brightness can be controlled through the i 2 c interface as described later. the outputs can be connected together in parallel to drive a single led. in this case, two parallel current sources of equal value drive a single led. the external resistor value can be set accordingly to determine the desired output current. soft-start limits the inrush current during power-up. the built-in thermal protection turns off the display when the temperature exceeds 140c with a small hysteresis of 15c. the display is blanked (leds are turned off or in high-z state) on power-up. 3.1 low power mode of operation when not used, the STLED325 goes into low power mode of operation wherein the current consumption drops to less than 1 ma. during this mode, the data configured is maintained as long as the supply voltage is still present (the contents of the internal ram need the supply voltage to be present). port configuration and output levels are restored when the STLED325 is taken out of shutdown. for minimum supply current in shutdown mode, logic inputs should be at gnd or v cc . 3.2 i 2 c serial interface the interface is used to write configuration and display data to the STLED325. the serial interface comprises of a shift register into which sda is clocked on the rising edge of the scl after a valid start of communication. when communication is stopped, transitions on scl do not clock in the data. during this time, the data are parallel-loaded into a latch. the 8-bit data is then decoded to determine and execute the command. for an overflow condition, if more bytes are written, then they are ignored whereas if more bytes are read, then the extra bytes are stuffed with 1?s. 3.3 initial power up on initial power-up, all control registers are reset, the display is blanked and the STLED325 is in the low-power mode. all the outputs are in high-impedance state at initial power-up. the sda is pulled high by an external pull-up resistor. the display driver has to be configured before the display can be used.
functional description STLED325 12/62 doc id 17576 rev 1 3.4 display types figure 4. display types 3.5 keyscan the full keyscan is illustrated in the later sect ion of the datasheet. on e diode is required per key switch. the keyscan circuit detects any co mbination of keys being pressed during each de-bounce cycle. the keyscan matrix on the STLED325 passes command from the front panel to the host processor through the sda pin on STLED325. the STLED325 can be programmed to wake-up the system from standb y using any of the 16 keys pressed on the front panel. these wake-up keys are also referred to as hot-keys. 3.6 timers 3.6.1 guard timer for safety related applications, a guard timer is integrated in the STLED325. the guard timer gives enhanced relia bility to the device. the guard timer can be used to detect an out of-control microprocessor. the user programs the guard timer by setting the desired amount of time-out into the guard timer. this guard time has an initial de-fault value of 10s upon first power-up and subsequently can be configured from 1s to 15s during normal operation. if a time period of longer than 15s is desired, then the watchdog timer from rtc can be used. it can also be disabled after first power-up. if the processor does not clear the timer within the specified period, the STLED325 puts the system in the standby mode. this is only active from l to h transition on ready or wake_up pin but it is not level- based. the guard timer count is cleared by the guard timer clear/reset bit. while in normal mode, the count starts from the previously count value that was in the register. during the cold boot up or warm boot up, the count starts from the configured value. seven segment display with dot point and common-anode led panel
STLED325 functional description doc id 17576 rev 1 13/62 3.6.2 watchdog timer another watchdog timer is present in the watchdog timer register at address 09h of the rtc register map. this watchdog timer can be used to program timer values of greater than 15s. bits bmb4-bmb0 store a binary multiplier and the three bits rb2-rb0 select the resolution where: 000 = 1/16 second (16 hz); 001 = 1/4 second (4 hz); 010 = 1 second (1 hz); 011 = 4 seconds (1/4 hz); and 100 = 1 minute (1/60 hz). the watchdog timer is programmed by setting the desired timeout into the watchdog register, address 09h. the amount of timeout time is determined to be the multiplication of the 5-bit multiplier value with th e resolution values depicted by the watchdog resolution bits. the watchdog timer is disabled when its register is cleared by writing a value of 00h. hence the watchdog function is not enabled upon power on. it is enabled when a non-zero value is written into its register. the watchdog timer is reset by performing a write to the watchdog register, then the time-out period starts over. if the processor does not reset the timer within the specified timeout period, and when the timeout occurs, the watchdog flag is set. the watchdog timer of rtc is cleared by writing a 00 value and starts again whenever any new value is written to it. the watchdogen flag can be disabled or enabled by writing to the register bit and the reset of watchdog timer is done by writing to the register. 3.7 power-on-reset and soft-start the device integrates two internal power-on-res et circuits which initialize the digital logic upon power up. one circuit is for the v cc power and the other is for the v bat power. the soft-start circuit limits the inrush current and high peak current during power-up. this is done by delaying the input circuit?s response to the external applied voltage. during soft-start, the input resistance is higher which lowers the in-rush current when the supply voltage is applied.
functional description STLED325 14/62 doc id 17576 rev 1 3.8 led drivers the constant current capability is up to 40 ma per output se gment and is set for all the outputs using a single external resistor. when acting as digit drivers, the outputs source current to the display anodes. when acting as segment drivers, the led outputs sink current from the display common cathodes. the outputs are high impedance when not being used as digit or segment drivers. each port configured as a led segment driver behaves as a digitally-controlled constant current sink. the led drivers are suitable for both discrete leds and common anode (ca) numeric led digits. when fully configured as a led driver, the STLED325 controls up to 8 led segments in a single digit with individual 8-step adjustment of the constant current through each led segment. a single resistor sets the maximum segment current for all the segments, with a maximum of 40 ma per segment. the STLED325 drives any combination of discrete leds and common anode (ca) digits for numeric displays. the recommended value of rset is the minimum allowed value, since it sets the display driver to the maximum allowed segment current. rset can be a higher value to set the segment current to a lower maximum value where desired. the user must also ensure that the maximum current specifications of the leds connected to the drivers are not exceeded. 3.9 over temperature cut-off the STLED325 contains an internal temperature sensor that turns off all outputs when the die temperature exceeds 140c. the outputs are enabled again when the die temperature drops below 125c. register contents are not affected, so when a driver is over-dissipating, the external symptom will be the load leds cycling between on and off as the driver repeatedly overheats and cools, alternately turning the leds off and then back on again. this feature will protect the device from damage due to excessive power dissipation. it is important to have good thermal conduction with a proper lay-out to reduce thermal resistance. 3.10 standby mode by utilizing the standby function , the host processo r and other ics can be turned off to reduce power consumption. the STLED325 is able to wake-up the system when programmed hotkeys are detected to signal that the full operation of the system is required. the hotkeys can be entered to the system through the front panel keys or through the infrared (ir) remote control or the real time clock (rtc) alarm or through the wake-up pin. STLED325 supports multiple remote control protocols decoding by setting the appropriate register. the STLED325 is able to cut-off the power to the main board for standby operation for good power management. stby will be set to high when ready signal goes from high to low, i 2 c command for standby is seen or when the guard timer has finished counting down to 0, whichever occurs first. in the normal mode of operation, the stby is asserted only when the guard timer has finished counting down to 0. this is meant to put the system into stand-by even though standby command was not issued by the host or ready signal did not go low. this occurs as the guard timer register was not cleared before it finished counting down to 0.
STLED325 functional description doc id 17576 rev 1 15/62 3.10.1 cold boot up when power is first applied to the system, the STLED325 is reset. it will then manage the power to the main board by bringing the stby pin to a low level. this wakes up the main processor which asserts the ready pin to a high level to indicate to STLED325 of a proper boot-up sequence. if the microprocessor does not assert the ready pin to a high within 10s (default), the STLED325 cuts off the power to the host by asserting the stby pin. the high level on ready pin signifies that the processor is ready. after this, the processor can configure the STLED325 by sending the various i 2 c commands for configuration of display, rc protocol, rtc display mapping, hot-keys. the power-up behavior in 2 conditions is shown in figure 5 .
functional description STLED325 16/62 doc id 17576 rev 1 figure 5. power-up condition note: 1 guard timer is turned off by default upon ready assertion. 2 if guard timer is to be kept on during ready high condition, the guard timer registers must be set accordingly by proper commands through i 2 c bus. 3 in this power-up condition, guard timer is triggered by internal por pulse. 4 during power-up, the guard timer value is 10s. vcc to STLED325i internal por stby ready mute guard timer counts up to 10s 1a) power-up condition (normal behavior ) vcc to STLED325i internal por stby ready mute guard timer counts up to 10s 1b) power-up condition (processor not responding ) count over due to abnormality in the processor, ready did not change state from low to high, leading to stby assertion ready asserts within 10s which is the desired behavior, processor is active and not hung ready continues to remain low/high !-6
STLED325 functional description doc id 17576 rev 1 17/62 3.10.2 entering standby mode the STLED325 controls the power to the main board using the stby pin. during normal operation, the stby pin is a low level which externally controls a power mos switch to enable power to the main board. the STLED325 asserts the stby pin to a high when any one of the following conditions occur: ? processor fails to respond by enabling the ready pin within 10s upon first power-up (cold boot up) ? guard timer counts down to 0s ? processor makes the ready pin to low (can happen in various conditions such as user presses stby key on front panel, stby key on remote control, etc). figure 6. power down condition (normal behavior) ? guard timer can be kept on during normal condition when ready is high (depending on the user). ? in this condition, the guard timer can be disabled or enabled. if the guard timer is enabled, the timer needs to be cleared before the programmed count of the timer is reached. if the programmed count is reached, the stby will be asserted. ? it is advisable not to enable the guard timer during normal operation. !-6 ready stby 2a) power-down condition (normal behavior ) mute ready stby 2b) power-down condition (a bnormal behavior of processor ) mute in this case the ready rema ins high and as long as ready is high, the mute is low and stby is low. 2 us ready continues to remain high guard timer is not required here
functional description STLED325 18/62 doc id 17576 rev 1 3.10.3 wake-up the STLED325 can wake-up from any one of the following sources: ? front-panel keys ? remote-control keys ? real time clock (rtc) in 3 conditions (alarm, watchdog timer, oscillator fail) ? external wake-up pin (by a low to high transition on this pin) ? gpio status changes ? ready pin goes from low to high figure 7. standby condition (normal behavior) ? when the hot-key is detected either from front-panel or remote control or rtc or from a transition (low to high transition) on wake_up pin during stand-by, the stby pin de-asserts. ? the de-assertion of the stby triggers the guard timer. ? the timer value is the programmed value by the user (1-15s). if the user did not change the value before entering standby, then it remains 10s. ? also note that the guard timer is off when the STLED325 is in the standby mode. the guard timer is thus triggered by a de-assertion of the stby signal or by internal power on reset signal. !-6 stby 3a) standby condition (normal behavior ) hot key command from ir or key pad or rtc or wake_up for wake up ready mute stby 3b) standby condition (abnormal behav ior , processor is not responding) hot key command from ir or key pad or rtc or wake_up for wake up ready mute ready continues to remain low signals stby after guard timer count is over guard timer triggers ready asserts within programmed timer value (1s-15s) guard timer triggers
STLED325 functional description doc id 17576 rev 1 19/62 3.11 real time clock (rtc) the STLED325 integrates a low power serial rtc with a built-in 32.768 khz oscillator (external crystal controlled). eight bytes of the sram are used for the clock/calendar function and are configured in binary coded decimal (bcd) format. an additional 12 bytes of sram provide status/ control of alarm and watchdog functions. addresses and data are transferred serially via a two line, bi-directional i 2 c interface. the built-in address register is incremented automatically after each write or read data byte. note that all 4 digits must be enabled before using the rtc display. functions available to the user include a non-volatile, time-of-day clock/calendar, alarm interrupts and watchdog timer. the eight clock address locations contain the century, year, month, date, day, hour, minute, second and tenths/hundredths of a second in 24 hour bcd format. corrections for 28, 29 (leap year - valid until year 2100), 30 and 31 day months are made automatically. the rtc operates as a slave device through the slave address of the STLED325 on the serial bus. access is obtained by implementing a start condition followed by the correct device slave address. the 16 bytes contained in the device can then be accessed sequentially in the following order: ?1. reserved ? 2. seconds register ? 3. minutes register ? 4. hours register ? 5. day register ? 6. date register ? 7. century/month register ? 8. year register ? 9. calibration register ? 10. watchdog register ? 11 - 16. alarm registers the rtc keeps track of the date and time. once the date and time are set, the clock works when the STLED325 is in normal operation and standby operation. wake-up alarm feature is also included in the rtc module. the accuracy of the rtc is approximately 20 ppm (50secs/month). how-ever this much depends on the accuracy of the external crystal used. the wake-up alarm is programmed to wake up once the date and time set are met. this feature is present in normal and standby mode of operation. only one date and time is available for setting. the real time clock (rtc) uses an external 32.768 khz quartz crystal to maintain an accurate internal representation of the second, minute, hour, day, date, month, and year. the rtc has leap-year correction. the clock also corrects for months having fewer than 31 days. 3.11.1 reading the real time clock the rtc is read by initiating a read command and specifying the address corresponding to the register of the real time clock. the rtc registers can then be read in a sequential read mode. alarms occurring during a read are unaffected by the read operation.
functional description STLED325 20/62 doc id 17576 rev 1 3.11.2 writing to the real time clock the time and date may be set by writing to the rtc registers. the new rtc time can be updated by writing to the rtc registers. the new time only takes affect after a complete write cycle. if the write cycle is incomplete, t he new time value is discarded. a single byte may be written to the rtc without affecting the other bytes. 3.11.3 register table for rtc legend: cal_sign = sign bit osc_st = oscillator stop bit bmb0 ? bmb4 = watchdog multiplier bits cb = century bits abe = alarm in battery back up mode enable bit afe = alarm flag enable rb0 ? rb2 = watchdog resolution bits rpt1 ? rpt6 = alarm repeat mode bits table 2. register table for rtc addr d7 d6 d5 d4 d3 d2 d1 d0 functional/range bcd format 00h reserved reserved 01h osc_s t 10 seconds seconds seconds 00-59 02h rsvd 10 minutes minutes minutes 00-59 03h md_hm_ms 10 hours hours (24 hours format) hours 00-23 04h rsvd rsvd rsvd rsvd rsvd day of week day 01-7 05h rsvd rsvd 10 date day of month date 01-31 06h cb1 cb0 rsvd 10m month century/month 0-3/01-12 07h 10 years year year 00-99 08h 12/24 rsvd cal_sig n calibration calibration 09h rb2 bmb4 bmb3 bmb2 bmb1 bmb0 rb1 rb0 watchdog 0ah afe rsvd abe ai 10m alarm month al month 01-12 0bh rpt4 rpt5 ai 10 date alarm date al date 01-31 0ch rpt3 rpt6 ai 10 hour aiarm hour ai hour 00-23 0dh rpt2 alarm 10 minutes alarm minutes al min 00-59 0eh rpt1 alarm 10 seconds alarm seconds al sec 00-59 0fh wdfen alarm: day of week rsvd (bypass mode) flags
STLED325 functional description doc id 17576 rev 1 21/62 wdfen = watchdog flag enable 12/24 = 12 hour or 24 hour format (?0? for 24-hour format and ?1? for 12-hour format). for 12 hour pm display, the 8th segment of last digit (digit 4) is driven to indicate pm mode through a dot on the last digit. it is recommended to fill the un used bits in the regi ster map to 0 upon a cold boot up. the timekeepers and alarm store data in bcd format, while the calibration, watchdog bits are in binary format. the structure of the frame is shown below. for rtc, all the dig1 to dig4 must be configured to show the proper time. figure 8. keyscan and digit mapping if the date programmed in the rtc exceeds a valid date value, then the rtc does not function as desired. so the invalid dates should never be programmed into the rtc. 3.11.4 setting alarm clock registers address locations 0ah-0eh contain the alarm settings. the alarm can be configured to go off at a prescribed time on a specific month, date, hour, minute, or second or repeat every year, month, day, hour, minute, or second. it can also be programmed to go off while the STLED325 is in the standby mode to serve as a system wake-up call. bits rpt6-rpt1 put the alarm in the repeat mode of operation. codes not listed in the table default to the once per second mode to quickly alert the user of an incorrect alarm setting. note that by default, the alarm repeat mode is enabled and by default the repeat frequency is set to ?once per year?. address locations 0ah to 0eh contain the alarm settings. the alarm can be configured to go off at a prescribed time. the default repeat alarm mode is once per year. programming the rpt[6:1] bits changes the repeat alarm mode. am0 8 722v1 key s c a n digit 5 ( us ed for di s crete led) dig 1 dig 2 dig 3 dig 4
functional description STLED325 22/62 doc id 17576 rev 1 if the rpt value is other than the valid ones listed in the table, the default repeat alarm mode is once per second so as to quickly alert the user of an incorrect alarm setting. when the clock information matches the alarm clock settings based on the match criteria defined by rpt[6:1], then the alarm flag is set. then if the alarm flag enable bit, is also set, this will activate the alarm interrupt. interrupt is cleared by reading the interrupt registers. 3.11.5 century bits the clock shall include correction for leap years. the clock shall also correct for months fewer than 31 days. corrections for 28, 29 (leap year ?valid until year 2100), 30, 31 day months must be made automatically. the two century bits increment in a binary fashion at the turn of the century, and handles all leap years correctly. see table for additional explanation. table 3. alarm repeat modes rpt5 rpt4 rpt3 rpt2 rpt1 rpt6 repeat alarm mode 1 1 1 1 1 1 once per week 1 1 1 1 1 0 once per second 1 1 1 1 0 0 once per minute 1 1 1 0 0 0 once per hour 1 1 0 0 0 0 once per day 1 0 0 0 0 0 once per month 00 0 0 0 0once per year table 4. century bits examples cb[0] cb[1] leap year? example (1) 1. leap year occurs every 4 years (for years evenly divisible by 4), except for years evenly divisible by 100. the only exceptions are those year s evenly divisible by 400. (the y ear 2000 was a leap year, year 2100 is not.) 00yes2000 0 1 no 2100 1 0 no 2200 1 1 no 2300
STLED325 functional description doc id 17576 rev 1 23/62 3.11.6 initial power-on defaults upon application of power to the device, the register bits in the rtc initially power-on in the state indicated in table below. initial power-on defaults value of the rtc registers. note: all other control bits power-up in a default state of 0 unless otherwise specified. table 5. initial power-on defaults osc_st afe wdfen 000
functional description STLED325 24/62 doc id 17576 rev 1 3.11.7 programmable display the default display of the rtc time is the 2 msb digit for hour and the 2 lsb digit for minutes. however, if the md_hm_ms bit is se t, then the rtc display for the digits can be changed according to ta bl e 6 . 3.11.8 lookup table with ppm agains t the calibration register values the lookup table of the calibration register values for the equivalent ppm is shown in ta b l e 7 below: table 6. rtc display md_hm_ms rtc display 10 date-month 00 hour-minute (defau lt and recommended) 01 minute-second 11 month-date table 7. lut with ppm against the calibration register values sign bit counts/bit ppm 0000000 0000012 0000104 0000116 0001008 00010110 00011012 00011114 00100016 00100118 00101020 00101122 00110024 00110126 00111028 00111131 01000033 01000135 01001037 01001139 01000041 01000143 01001045 01001147
STLED325 functional description doc id 17576 rev 1 25/62 01110049 01110151 01111053 01111155 01110057 01110159 01111061 01111163 1000000 100001-4 100010-8 100011-12 100100-16 100101-20 100110-24 100111-28 101000-33 101001-37 101010-41 101011-45 101100-49 101101-53 101110-57 101111-61 110000-65 110001-69 110010-73 110011-77 110000-81 110001-85 110010-90 110011-94 111100-98 111101-102 111110-106 111111-110 111100-114 111101-118 111110-122 111111-126 table 7. lut with ppm against the calibration register values (continued) sign bit counts/bit ppm
functional description STLED325 26/62 doc id 17576 rev 1 3.12 remote control decoder the remote control (rc) decoder module decodes the signal coming from ir_in pin. the ir remote control protocols re cognized by STLED325 are philips-rc-5, rcmm, thomson rca, r2000, nec and r-step protocols. the selection of remote control protocol to use is done by setting the rc protocols register. the command from the remote control is used to wake-up from standby and resume normal operation. all rc keys can be programmed to act like rc hotkeys. upon receiving any one of the designated hotkeys, wake-up operation begins. the address of the appliance (8-bit) is stored first into the internal ram. then, the command for the hotkeys is programmed into the internal ram. each hotkey memory address could accommodate one byte (8-bit). usually one byte is reserved for one command. the hot-keys can be configured to wake-up the system by more than one rc device address (up to a maximum of 8 device addresses). 3.13 interrupt the STLED325 interrupts the ho st by pulling the irq_n pin to a low-level both in normal mode of operation and during wake-up. the interrupt is enabled by STLED325 when any of the conditions occur: ? front panel key press in normal operation or during system standby state ? remote control key press in normal operation or during system standby state (including the toggle bit changes for all rc protocols) ? a low-to-high on the external pin, wake_up ? real time clock triggers (alarm, watchdog timer, 32 khz oscillator fails) ? gpio input changes ? low battery indication ? thermal shutdown the irq_n is an active low level signal and is cleared only after the interrupt buffer is read. after reading the interrupt buffer, the host will kn ow the actual source of the interrupt. this allows the host to exactly know the event which caused the interrupt (e.g stby key on the front panel). the interrupt signal is used to inform the host of any events detected by the STLED325. note that the irq_n pin is an open-drain pin which requires an external pull-up resistor. figure 9. interrupt the interrupt output is of active low level type.
STLED325 functional description doc id 17576 rev 1 27/62 while the interrupt is being read by the mcu and a new gpio or key data comes in, no new interrupt is generated but the register for gpio and key data is updated so that the mcu does not miss the new key and gpio data. 3.14 ready the STLED325 supports cutting-off power to the main board for standby operation for good power management. stby will be set to high wh en the ready transitions from high to low. during a cold boot up or wake up from standby, if the ready pin stays low, the STLED325 will assert the stby when the guard time r has finished counting down to 0. when the ready drops to a low, mute goes high immediately and soon after (2s minimum) the stby is asserted. in the normal mode of operation, when read y is a high, the stby is asserted only when the guard timer is enabled and has finished counting down to 0. this is meant to put the system into stand-by as the ready pin was stuck at high and the guard timer register was not cleared before it finished counting down to 0. it is advised to disable the guard timer during normal operation. 3.15 mute the mute pin will be set to logic high to mute the audio output before power is cut to the host processor. in wake up mode, the mute pin will be set to logic low to enable the audio output immediately after the high assertion of the ready pin. in general, mute follows ready pin with an inverted polarity. this pin is used to prevent pop-up sound during power- up and power-down states. 3.16 gpio the STLED325 supports 2 additional gpios that can be configured as inputs or outputs. as an input, the gpio can be used to interface to a sensor or a switch or key and as an output, the gpio can be used to drive individual indicator leds. 3.17 power sense circuits the STLED325 has a built-in power sense circuit which detects power failures and automatically switches to the battery or super-cap supply when a power failure occurs. the energy needed to sustain the sram and clock operations can be supplied by small lithium button supply or a super-cap when a power failure occurs. when operating from the battery or super-cap, all the inputs and outputs are driven to a known state (generally l).
functional description STLED325 28/62 doc id 17576 rev 1 figure 10. power sense circuit for the STLED325 itself, there is the normal operational mode where the supply is from the 5v v cc . when the v cc drops below a pre-defined low level, the supply source is switched from the v cc to the battery or super-cap supply. to conserve power and maintain long battery life in this battery supply mode, only the rtc and the clock to the rtc remain operational. 1. the system will only go into battery mode while: vcc < 3.5 v and vcc < vbat. so, it means that the system will only switch to battery mode when vcc drop below 3.5v and battery voltage is higher v cc voltage. 2. the system will enter back into vcc mode from battery mode while: v cc > v bat it means that the system will switch bac k to vcc mode as soon as the v cc is higher than vbat. the STLED325 continually monitors vcc for an out-of-tolerance condition. should v cc fall below the switchover voltage (v so = 3.5 v), the device goes into a low-power mode. inputs to the device will not be recognized at this time to prevent any er roneous data or outcome from device. the device also automatically switches over to the battery and powers down into an ultra low current mode of operation to maximize the super-cap or battery duration. as system power returns and v cc rises above vbat, the battery or super-cap is disconnected and the power supply is switched to the external v cc . during the battery or super-cap back- up mode, the clock registers of rtc are maintained by the attached battery or super-cap. on power-up, when v cc returns to a nominal value, write protection continues for t rec (refer to timing diagram in later part of spec). upon power-up, the device switches from battery to v cc when v cc > vbat. when v cc rises above vbat, it will recognize the inputs.
STLED325 functional description doc id 17576 rev 1 29/62 figure 11. circuit the minimum operating voltage of STLED325 is 2.5 v with a typical vbat voltage of vcc- vf (diode). therefore, the typical delta voltage swing across the capacitor is v = v cc ? v f ? v ccmin where v f is approximately 0.5 v. therefore, v = 5 ? 0.5 ? 2.5 = 2 v since the typical battery current (ibat) is limited to 7 a, the capacitance and duration of power-out time can be calculated using the formula: i = c v/ t where i = 7a, v=2v, c= capacitance in farads and t is power-out time in seconds. using a 0.1f super-cap, for example, the equation would be: 7a = 0.1f x 2v/ t solving for t, the typical power-down time is about 28,571 seconds = 8 hours. 3.17.1 switchover during the period the v cc falls, in order for the battery switchover circuit to work reliably, the fall time of v cc from 5v to 0v should be at least 100s. this is to allow the comparator to trigger and switch from v cc to v bat mode should there be a need. during the v cc rise period from 0v to 5v, the rise time of v cc is not critical. this is indicated by the figure 12. figure 12. battery switchover waveform also note that for battery oper ation, there will be a current spike of 5ma in 10us into the battery when v cc to v bat switchover happens. from v bat to v cc switching, the current
functional description STLED325 30/62 doc id 17576 rev 1 spike is very low into the battery. the battery must be protected against such spikes. this is not relevant for super-cap. during the switching from v bat to v cc , the i2c is active after a minimum of 5ms. 3.17.2 battery low warning the STLED325 automatically performs battery voltage monitoring upon power-up. if the interrupt for this condition (abe ) is enabled, the rtc will genera te an interrupt pulse if the battery voltage is found to be less than a minimum of 2.5v. however, this condition is unlikely to go away very quickly as time is needed for the battery to be replaced, and it is not desirable to keep issuing an interrupt. therefore when this bit is set, this condition is checked once every week. if the condition is still true, then interr upt is sent again. the abe bit is an enable bit fo r battery status check. if the abe bit was set and the battery low is generated during a power up sequence, this indicates that the battery is below approximately 2.5 v and may not be able to maintain data integrity. at this point, a fresh battery needs to be installed or the super-cap recharged. this situation only occurs when a battery is us ed but not with a super-cap as the super-cap re-charges when the supply is present. 3.17.3 different po wer operation modes the device is capable to support the different power modes as shown in the table 8. table 8. different power operation modes v cc v bat condition operation present present v cc > v bat normal operation of chip from v cc present absent (float or 0v) v cc > v bat and v cc > 3.5v normal operation of chip from v cc until v cc is 3.5v absent (float or 0v) present v bat > 2.5v chip operations from v bat in a low power mode of operation v cc < 3.5v v bat > v cc chip operations from v bat in a low power mode of operation absent (float or 0v) absent (float or 0v) v cc < 3.5v and v bat < 2.5v chip does not function. completely shutdown.
STLED325 functional description doc id 17576 rev 1 31/62 3.18 bus characteristics the bus is intended for communication between di fferent ics. it consists of two lines: a bi- directional data signal (sda) and a clock signal (scl). both the sda and scl lines must be connected to a positive supply voltage (typical voltage is 3.3 v) via a pull-up resistor (typical value is 10 k). the following protocol has been defined. - data transfer may be initiated only when the bus is not busy. - during data transfer, the data line must remain stable whenever the clock line is high. - changes in the data line, while the clock line is high, will be in terpreted as control signals. accordingly, the following bus conditions have been defined: bus not busy: both data and clock lines remain high. start data transfer: a change in the state of the data line, from high to low, while the clock is high, defines the start condition. stop data transfer: a change in the state of the data line, from low to high, while the clock is high, defines the stop condition. data valid: the state of the data line represents valid data when after a start condition, the data line is stable for the duration of the high period of the clock signal. the data on the line may be changed during the low period of the clock signal. there is one clock pulse per bit of data. each data transfer is initiated with a start co ndition and terminated with a stop condition. the number of data bytes transferred between the start and stop conditions is not limited. the information is transmitted byte-wide and each receiver acknowledges with a ninth bit. by definition a device that gives out a message is called ?transmitter,? the receiving device that gets the message is called ?receiver.? th e device that controls the message is called ?master.? the devices that are controlled by the master are called ?slaves.? acknowledge: each byte of eight bits is followed by one acknowledge bit. this acknowledge bit is a low level put on the bus by the receiver whereas the master generates an extra acknowledge related clock pulse. a slave receiver which is addressed is obliged to generate an acknowledge after the reception of each byte that has been clocked out of the master transmitter. the device that acknowledges has to pull down the sda line during the acknowledge clock pulse in such a way that the sda line is a stable low during the high period of the acknowledge related clock pulse. of course, setup and hold times must be taken into account. a master receiver must signal an end of data to the slave transmitter by not generating an acknowledge on the last byte that has been clocked out of the slave. in this case the transmitter must leave the data line high to enable the master to generate the stop condition. note: refer to philips i 2 c specification or contact stmicroelectronics for more information on i 2 c.
functional description STLED325 32/62 doc id 17576 rev 1 table 9. pin description pin number symbol type name and function 1 mute out output from the STLED325 to gracefully mute the audio before entering standby mode 2irq_nout interrupt output (active low level type) to interrupt the mcu under various conditions 3 gpio0 in/out gpio0 that can be c onfigured as an input or output 4 gpio1 in/out gpio1 that can be c onfigured as an input or output 5 ir_in in remote control data input 6 sda in/out i 2 c compatible serial data i/o 7sclini 2 c compatible serial clock input 8 wake_up input wake-up pin (can be used for wake-up on detecting a low to high transition). av wake-up or cec wake-up. 9dig5out digit output pin. can be used in conjunction with 8 segment outputs to control 8 discrete leds on the front panel. 10 - 13 dig4 ?dig1 out digit output pins 14 vcc pwr 5.0 v 10% main supply voltage. bypass to gnd through a 0.1 f capacitor as close to the pin as possible. 15, 16 key2-key1 in input data to these pins from external keyboard are latched at end of the display cycle (maximum keyboard size is 8 x 2). 5v digital input. 17 - 24 seg8/ks8 to seg1/ks1 out segment output pins (dual function as key source) 25 iset in current sense input. connect resistor to ground to set constant current through leds. connect to gnd through a resistor to set the peak segment current. 26 vbat input battery power supply for the rtc when there is no supply to the chip 27 vreg output 1.8v regulator output. connect to an external capacitor. 28 gnd pwr connect this pin to system gnd 29 xin in connect to an external crystal or apply external clock 30 xout out output of the external crystal. open when external clock 31 stby out hardware pin to control the power to the host 32 ready in input to the device from the ho st to indicate that host is ready epad exposed pad. connect to pcb gnd.
STLED325 electrical ratings doc id 17576 rev 1 33/62 4 electrical ratings 4.1 absolute maximum ratings (t a = 25 c, gnd = 0 v) absolute maximum ratings are those values above which damage to the device may occur. functional operation under these conditions is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. all voltages are referenced to gnd. table 10. absolute maximum ratings (t a = 25 c, gnd = 0 v) symb ol parameter value uni t v cc supply voltage to ground -0.5 to +7.0 v v i logic input voltage (key1, key2 inputs) -0.5 to +7.0 v v i logic input voltage (all input pins except key1, key2) -0.5 to +3.6 v p d power dissipation 1 1200 mw t a operating ambient temperature -40 to 85 c t j junction temperature 150 c t stg storage temperature -65 to +150 c t l lead temperature (10 sec) 300 c v esd electrostatic discharge voltage on all pins 2 human body model -2 to +2 kv table 11. thermal data symbol parameter qfn 32 unit r tj-c thermal resistance junction-case tbd c/w
electrical ratings STLED325 34/62 doc id 17576 rev 1 4.2 recommended operating conditions 4.2.1 dc electrical characteristics (t a = -40 to +85 c, v cc = 5.0 v 10%, gnd = 0 v) table 12. dc electrical characteristics symbol parameter test conditions min typ max uni t v cc external supply voltage 4.5 5.0 5.5 v v reg internal logic supply voltage and regulator output 1.62 1.8 1.98 v v ih high level input voltage (all digital pins except key1 and key2) high level guaranteed 1.35 1.98 v v il low level input voltage (all digital pins except key1 and key2) low level guaranteed 00.45v v ih high level input voltage (key1 and key2 pins) high level guaranteed 35.5v v il low level input voltage (key1 and key2 pins) low level guaranteed 02v i ih , i il input current (all pins) v in = v ih or v il -2 2 a v hys hysteresis voltage (digital pins) 0.2 v v ol low level output voltage (digital output pins) i ol2 = 4 ma 0.4 v i oleak driver leakage current drivers off -150 a i seg segment drive led sink current v led = v f = 2.5 v v digit = v cc ? 1.0 -30 -40 -50 ma i dig digit drive led source current v digit = v cc ? 1.0 240 320 400 ma i tolseg segment drive current matching v cc =5.0 v, t a =25c v led =2.5v; led current = 40 ma 4.0 % r set external current setting reference resistor (precision = 1% tolerance) i seg = 40 ma 360
STLED325 electrical ratings doc id 17576 rev 1 35/62 4.3 power consumption estimation each port of the STLED325 can sink a maximum current of 40 ma into an led with a 3.4 v forward voltage drop when operated from a supply voltage of 5.0 v. the minimum voltage drop across the internal led drivers is thus 5.0 - 3.4 = 1.6 v. the STLED325 can sink 8 x 40 = 320 ma when all outputs are operating as led segment drivers at full current. on a 5.0 v supply, a STLED325 dissipates (5.0 v-3.4 v) x 320 ma = 512 mw when driving 8 of these 3.4 v forward voltage drop leds at full current. if the application requires high drive current, consider adding a series resistor to each led to drop excessive drive voltage off- chip. if the forward voltage of the led is lesser than 4.4 v (say 2.4 v), then the maximum power dissipation of STLED325 when all segments are turned on will be (5 - 2.4) v x 320 ma = 832 mw. to lower the power dissipation, consider adding a small series resistor in the supply. another alternative is to in-crease the value of the rset to lower the current of the leds from 40 ma to say 30 or 20 ma. the efficiency will be the power consumption in the leds divided by the input power consumed. equation 1 efficiency = vdiode x idiode / v cc x i cc as an example, consider led with forward voltage of vf = 2.4 v, ipeak = 40 ma, vcc (max) = 5.5 v, n=number of segments=8(max), d=duty cycle=15/16, power dissipation, pd (max) = 5 ma x 5.5 v + (5.5-2.4) v x (15/16) x 40 ma x 8 = 27.5 + 780 = 807.5 mw. to lower this value, add a series resistor with the supply. note that the above analysis is for a typical condition. if the vf is higher and the supply voltage is lower than 5v, then it is recommended to operate the led at a lower current than 40ma in order to have enough headroom for the digit and segment drivers so as not to affect the brightness and matching. table 13. voltage drop estimation with rgb led led typical forward voltage vf typical current typical supply voltage digit driver drop external vf segment driver drop red 2.2 v 40 ma 5 v 1 v 2.2 v 1.8 green 2.5 v 40 ma 5 v 1 v 2.5 v 1.5 blue 3v 40ma 5v 1v 3v 1v table 14. capacitance (t a = 25c, f = 1 mhz) symbol parameter test conditions min typ max unit c in input capacitance (all digital pins) 15 pf
electrical ratings STLED325 36/62 doc id 17576 rev 1 ) note: the transmitter must internally provide a hold time to bridge the undefined region (300ns max) of the falling edge of the scl. table 15. power supply characteristics (t a = -40 to 85c) symbol parameter test conditions min typ max unit i cc operating power supply current all blocks of chip on except that no display load v cc = 5.5v tbd ma i cc(q) quiescent supply current display off v cc = 5.5v 2ma table 16. dynamic switching characteristics (t a = -40 to +85 c, v cc = 5.0v 10%, gnd=0.0v, typical values are at 25c) symbol parameter min typ max units f scl scl clock frequency 0 400 khz t low clock low period 1.3 s t high clock high period 600 ns t r sda and scl rise time 300 ns t f sda and scl fall time 300 ns thd:sta start condition hold time (after this period the first clock pulse is generated) 600 ns tsu:sta start condition setup time (only relevant for a repeated start condition) 600 ns tsu:dat data setup time* 100 ns thd:dat data hold time 0 s tsu:sto stop condition setup time 600 ns tbuf time the bus must be free before a new transmission can start 1.3 s trec watchdog output pulse width 96 98 ms
STLED325 electrical ratings doc id 17576 rev 1 37/62 table 17. timing characteristics (t a = -40 to +85 c, v cc = 5.0 v 10%, gnd=0.0 v , typical values are at 25 c ) parameter symbol min typ max unit test conditions propagation delay time t plz 300 ns clk -> sda c l = 15 pf, r l = 10 k t pzl 100 ns rise time t tzh1 2s c l = 300 pf seg1 to seg12 grid1 to grid8, seg13/grid16 to seg20/grid9 t tzh2 0.5 s fall time t thz 120 s c l = 300 pf, segn, dign input capacitance c i 15 pf mute active to standby active t m - s 2s gpio edge to interrupt trigger t irq 8s
electrical ratings STLED325 38/62 doc id 17576 rev 1 4.4 oscillator and crystal characteristics table 19. crystal electrical characteristics note: 1 oscillator is not production tested. 2 externally supplied. st recommends the citizen cfs-145 (1.5 x 5 mm) and the kds dt-38 (3 x 8 mm) for thru-hole, or the kds dmx-26s(3.2x8mm) for surface-mount, tuning fork- type quartz crystals. kds can be contacted at kouhou@kdsj.co.jp or http://www.kdsj.co.jp citizen can be contacted at csd@citizen-ame rical.com or http://www.citizencrystal.com 3 circuit board layout considerations for the 32.768khz crystal of minimum trace lengths and isolation from rf generating signals should be taken into account. 4 guaranteed by design. table 18. oscillator characteristics symbol parameter conditions min typ max unit v sta oscillator start voltage 10 seconds 1.5 v tsta oscillator start time v cc = 3.0 v 1 s cl1 x in 25 pf cl2 x out 25 pf ic-to-ic frequency variation (1) 1. reference value. t a = 25 deg c, v cc = 3.0 v, cfm-145 (c l = 6 pf, 32.768 khz) manufactured by citizen. -20 +20 ppm symbol parameter conditions min typ max unit fo resonant frequency (1) 1. externally supplied. st recomm ends the citizen cfs-145 (1.5 x 5 mm) and the kds dt-38 (3 x 8 mm) for thru-hole, or the kds dmx-26s(3.2x8mm) for surface- mount, tuning fork-type quartz crystals. kds can be contacted at kouhou@kdsj.co.jp or http://www.kdsj.co .jp. citizen can be contacted at csd@citizen- americal.com or http://www.citizencrystal.com 32.768 khz rs series resistance (2) 2. circuit board layout consi derations for the 32.768khz crystal of mi nimum trace lengths and isolation from rf generating signals should be taken into account. 35 40 (3) k cl load capacitance 12.5 pf
STLED325 electrical ratings doc id 17576 rev 1 39/62 4.5 esd performance figure 13. power down/up mode ac waveforms table 20. esd performance symbol parameter test conditions min typ max unit esd mil std 883 method 3015 (all pins) hbm 2kv table 21. battery range and battery detect symbol parameter conditions min typ max unit vbat (1) 1. stmicroelectronics recommends the rayovac br1225 or br1632 (or equivalent) as the battery supply. battery supply voltage 2.5 3 3.5 (2) 2. for rechargeable back-up, v bat (max) may be considered v cc . v i bat battery supply current t a =25c, v cc = 0 v, oscillator on, v bat =3 v 710 ua table 22. power down/up ac characteristics symbol parameter (1)(2) 1. v cc fall time should not exceed 5mv/s. 2. valid for ambient operating temperature: t a =-40 to 85, v cc = 2.5v to 5.5v (except where noted) min typ max unit tpd scl and sda at v ih before power down 0 ns trec scl and sda at v ih after power-up 10 s table 23. power down/up trip points dc characteristics symbol parameter (1)(2) min typ max unit v so battery back-up switchover voltage (from v cc to v bat ) v cc < 3.5v and v cc < v bat v v so battery back-up switchover voltage (from v bat to v cc ) v cc > v bat v
electrical ratings STLED325 40/62 doc id 17576 rev 1 figure 14. v cc characteristics 1. all voltages are referenced to gnd. 2. valid for ambient operating temperature: t a =-40 to 85, v cc = 2.5v to 5.5v (except where noted) table 24. thermal shutdown characteristics (1) 1. thermal shutdown is not production tested. symbol parameter conditions min typ max unit tsd thermal shutdown threshold vcc=5v 140 deg c thys hysteresis vcc=5v 15 deg c
STLED325 display ram address and display mode doc id 17576 rev 1 41/62 5 display ram address and display mode the display ram stores the data transmitted from an external device to the STLED325 through the serial interface. the addresses are as follows, in 8-bits unit: ?0? in memory means gnd on outpu; ?1? in memory means v cc on output. table 25. bit map for segment 1 to segment 8 seg1 seg4 seg8 10 h l 10 h u dig1 11 h l 11 h u dig2 12 h l 12 h u dig3 13 h l 13 h u dig4 14 h l 14 h u dig5 b0 b3 b4 b7 xx h l xx h u
key matrix and key-input data storage ram STLED325 42/62 doc id 17576 rev 1 6 key matrix and key-input data storage ram the key matrix is of 8x2 configuration, as shown below: figure 15. key matrix and key-input data storage ram the data of each key are stor ed as illustrated below, and ar e read by the appropriate read command, starting from the least significant bit. all the front panel keys can be configured as hot keys using the ?configuration mode setting command?. alternatively, any number of keys out of 16 keys can be programmed for hot key functions by using the hot-key setting command. it is recommended to read the hot key values immediately upon stby de-assertion. if they are not read within the guard preset timer value, the hot key data are cleared. it is recommended to have 10 k pull down resistors on the key1 and key2 input pins and the output seg/ks pins can see a maximum load of 300pf. this load condition is important for the key dis-charge cycle time. key 1 key 2 key 1 key 2 key 1 key 2 key 1 key 2 seg1 ks1 seg2 ks2 seg3 ks3 seg4 ks4 seg5 ks5 seg6 ks6 seg7 ks7 seg8 ks8 b0 b1 b2 b3 b4 b5 b6 b7
STLED325 commands doc id 17576 rev 1 43/62 7 commands a command sets the display mode and status of the led driver. the first 1 byte input to the STLED325 through the sda pin after the slave address is regarded as a command. if slave address is not transmitted before the commands/data are transmitted, the commands/data being transmitted are invalid (however, the commands/data already transmitted remain valid). 7.1 configuration mode setting command this command initializes the STLED325 and performs any one of the following functions: i) selects the duty factor (1/8 to 1/16 duty factor). when this command is executed, display is turned off. to resume display, the display on command must be executed. if the same mode is selected, nothing is performed. ii) selects the remote control protocol to use. iii) sets the guard time r. the guard timer is configurable from 1 to 15s or turned off completely. iv) sets the guard timer action to perform when the guard timer counts. two actions are allowed: no action or set stby to high level. bits b7-b6 = 00 is decoded as a configurat ion mode setting command. the subsequent bits are de-coded as follows: b5: enables wake-up from the external wake_up pin b4: enable for the display configuration setting change (number of digits) b3: allows display of rtc (during normal or stby modes) b2: enables all rc keys as hot-keys b1: enables all fpk keys as hot-keys b0: enables the guard timer to issue stby once the timer expires note: when displaying the rtc during normal mode, if the p is writing data to STLED325 using i 2 c bus, the rtc display on led momentarily turns off. the first byte after the configuration command is in the following format: remote control protocol setting (bits b6-b4) 000: rc disabled (default) msb lsb 0 0 b5 b4 b3 b2 b1 b0 msb lsb b7 b6 b5 b4 b3 b2 b1 b0
commands STLED325 44/62 doc id 17576 rev 1 001: philips rc-6 (optiona l only enabled for philips) 010: philips rc-5 011: philips rcmm 100: nec 101: r-step 110: thomson r2000 111: thomson rca when b7=?0?, incoming rc data is output on sda in decoded format where the device address, start bit, toggle bit and data bits are sent. note that the default location is 0x00 for the first device address. this order of the bi ts sent is in the same format as the incoming rc data. when b7=?1?, incoming raw data (no header information) is output on sda. address decoding is still performed to decode th e corresponding rc protocol. the format of the data on sda corresponds to the format of the respective rc frame. for details, refer to the rc protocol section of the datasheet. guard timer setting (bits b3-b0) 0000: turned off (guard timer disabled) 0001: 1 seconds 0010: 2 seconds 1111: 15 seconds the second byte after the configuration command is in the following format: 7-segment display mode setting (bits b1-b0) 00: 1 digit, 8 segments (digit 1 pin output is enabled) 01: 2 digits, 8 segments (digit 1 and digit 2 pin outputs are enabled) 10: 3 digits, 8 segments (digit 1, digit 2 and digit 3 outputs are enabled) 11: 4 digits, 8 segments (digit 1, digit 2, digit 3 and digit 4 outputs are enabled) b2: configuration for the digital outputs of the chip b2 = 1 will enable the outputs of the ch ip to be push pull type to 1.8v b2 = 0 will enable the outputs of the chip to be open-drain (can be ex ternally pulled up to 3.3v) b3: configuration for the gpio0 msb lsb b7 b6 b5 b4 b3 b2 b1 b0
STLED325 commands doc id 17576 rev 1 45/62 b3 = 0 enables the gpio0 as input b3 = 1 enables the gpio0 as output b4: configuration for the gpio1 b4 = 0 enables the gpio1 as input b4 = 1 enables the gpio1 as output b5 = interrupt enable register bit for gpio (applies to both gpio0 and gpio1) b5 = 0 disables the interrupt generation from any of the two gpios b5 = 1 enables the interrupt generation from any of the two gpios inputs change b6 = configuration of the edge trigger for gpio0 (works only when b5 is enabled) b6 = 0 sends interrupt when gpio0 triggers from a high to a low b6 = 1 sends interrupt when gpio0 triggers from a low to a high b7 = configuration of the edge trigger for gpio1 (works only when b5 is enabled) b7 = 0 sends interrupt when gpio1 triggers from a high to a low b7 = 1 sends interrupt when gpio1 triggers from a low to a high the minimum pulse width for a valid gpio detection must be 8us minimum. upon power application, the following modes are selected: display mode setting: the 4-digit, 8-segment mode is selected (default: display off and keyscan on). remote control protocol setting: rc-5. guard timer setting: turned on with 10s. after the first command is processed by STLED325, the guard timer is turned off until it is turned on by the host. guard timer action: issue standby.
commands STLED325 46/62 doc id 17576 rev 1 7.2 data setting command this command sets the data-write and data-read modes. description: bits b7-b6 = 01 is decoded as a data setting command. the subsequent bits are decoded as follows: b5 b4 = 00: data write command (see bits b1-b0) b5 b4 = 01: data write 1 command (see bits b1-b0) b5 b4 = 10: data read 1 command (see bits b1-b0) b5 b4 = 11: data read 3 command (see bits b1-b0) b3: clear the guard timer (no change in guard time) b2: when set to a 1, the guard timer is forced to enable and starts the count again. while in normal mode, the count starts note 1: the following byte with msb7 and msb6 corresponds to gpio[1:0] for data to be written into gpio1 and gpio0 when they are configured as outputs. figure 16. data write command (b7 b6) for gpio when b7 is 1, it drives logic 1 on gpio1 output and when it is 0, it drives logic 0 on gpio1 output. when b6 is 1, it drives logic 1 on gpio0 output and when it is 0, it drives logic 0 on gpio0 output. msb lsb 0 1 b5 b4 b3 b2 b1 b0 table 26. data write command. b5 b4: 00 b1-b0 00 write memory (display or rtc) ? address range: 0x00-0x0f. start address pointer location is 0x00. 01 write memory (display). address range: 0x10-0x13. start ad-dress pointer location is 0x10. 10 write memory (discrete led). address: 0x14. 11 write data into gpios if they are co nfigured as outputs (see note 1) m s b7 r s vd m s b6 r s vd r s vd r s vd r s vd r s vd m s b l s b gpio1 gpio0
STLED325 commands doc id 17576 rev 1 47/62 any subsequent data bytes in this case will be ignored. on power application, the normal operation mode and address increment mode is set with the default display memory address set to 0x10 (start of display memory address location). refer to the display memory section. in the auto increment address mode, the address command is sent once followed by the data bytes. alternatively, the data command can be sent followed by the data bytes. in this case, when new display data is to be written, the last value of the address will be used and then incremented. upon reaching the last display memory address, the address jumps to 0x10, as it represents the first address location of the display memory. table 27. data write 2 command. b5 b4: 01 b1-b0 00 reserved 01 reserved (rc6 disable) 10 reserved (rc6 enable) 11 enter standby mode table 28. data read 1 command. b5 b4: 10 b1-b0 00 read key (following 2 bytes will contain key data) 01 read gpio register (following 1 by te will contain the gpio data with msb7: gpio1 data and msb6: gpio0 data ). this is the input monitor for gpio[1:0] for reading purpose. when b7 of subsequent byte is low, it means that gpio1 input is low and when it is high, it means that gpio1 input is high. when b6 of subsequent byte is low, it means that gpio0 input is low and when it is high, it means that gpio0 input is high. 10 read rc data (following four bytes are the address + command bytes from rc) 11 read interrupt status register (ref er to the interrupt flag section for detailed description) table 29. data read 2 command. b5 b4: 11 b1-b0 00 reserved 01 read configuration byte values (see section on configuration bytes) 10 read led display memory 11 read rtc memory. address command must be issued prior to reading.
commands STLED325 48/62 doc id 17576 rev 1 in fixed address mode, the address command has to be sent followed by the display data. when next byte of data is to be written, address command has to be sent again before new display data byte. when the user wants to read the rtc data from the specified memory location of rtc, the user must first set the address of the rtc location using ?address setting command? after which send the ?read rtc register? command. if the address pointer was located in the display memory location and user issues a ?read rtc register? command without sending the ?address setting command?, the rtc data is read from the address location of the previous value of the rtc address pointer. thus before reading the rtc register data, the user must set the proper address for rtc using ?address setting command?. prior to writing data to the rtc registers, the address of the rtc must be set using the address setting command. else, if the address pointer happens to be pointing at the led display memory, then the data will be written to the address location of the previous value in the rtc address pointer. this is vice-versa true for the led display memory. 7.3 configuration data up to a maximum of 5-bytes are sent from lsb to msb as configuration data. the 29-bytes represent the following configuration information: on power application, the normal operation mode and address increment mode is set with the default display memory address set to 0x10 (start of display memory address location). refer to the display memory section. in the auto increment address mode, the address command is sent once followed by the data bytes. alternatively, the data command can be sent followed by the data bytes. in this case, when new display data is to be written, the last value of the address will be used and then msb (b7) lsb (b0) byte1 b7 b6 b5 b4 b3 b2 b1 b0 decoded/raw rc setting rc protocol setting guard timer setting byte 2 b7 b6 b5 b4 b3 b2 b1 b0 interrupt config for gpio1 interrupt config for gpio0 interrupt enable config for gpios gpio1 configuration (input or output) gpio0 configuration (input or output) digit 5 discrete led config 7-segment led display configuration setting byte 3 b7 b6 b5 b4 b3 b2 b1 b0 not used for display enable for display dimming setting byte 4 front panel hot key bank 1 byte 5 front panel hot key bank 2
STLED325 commands doc id 17576 rev 1 49/62 incremented. upon reaching the last display memory address, the address jumps to 0x10, as it represents the first address location of the display memory. in fixed address mode, the address command has to be sent followed by the display data. when next byte of data is to be written, address command has to be sent again before new display data byte. when the user wants to read the rtc data from the specified memory location of rtc, the user must first set the address of the rtc location using ?address setting command? after which send the ?read rtc register? command. if the address pointer was located in the display memory location and user issues a ?read rtc register? command without sending the ?address setting command?, the rtc data is read from the ad-dress location of the previous value of the rtc address pointer. thus before reading the rtc register data, the user must set the proper address for rtc using ?address setting command?. prior to writing data to the rtc registers, the address of the rtc must be set using the address setting command. else, if the address pointer happens to be pointing at the led display memory, then the data will be written to the address location of the previous value in the rtc address pointer. this is vice-versa true for the led display memory. 7.3.1 interrupt flags the interrupt is sent on the irq_n pin when any one of the event occurs (fp key pressed, rc key pressed or preset value of rtc/guard timer is trig gered or activity on wake_up pin or gpio pins). simultaneously, the interrupt flags are set. the micro-processor can read the interrupt flags by send-ing the read interrupt flag register command. the following 16-bit data is read by the processor after sending this command. this enables the microprocessor to know what caused the interrupt to occur. if the host sees an interrupt issued from first byte, it is not necessary to read the second byte. figure 17. interrupt bit mapping in byte 1 !-6 byte 1: msb lsb &0+ 2#+ '0)/;= '0)/;= &0 hotkey during wake up 4hermal shut down "atterylow 20 hotkey during wake up
commands STLED325 50/62 doc id 17576 rev 1 figure 18. interrupt bit mapping in byte 2 in the normal mode of operation, when any fp or rc key is pressed or when alarm/watchdog is triggered, the STLED325 sets the flags in the above interrupt flag register and asserts the irq_n pin. the data which caused the interrupt to assert remains in the buffer until it is changed by another key-press. it is up to the micro processor to issue the read interrupt command to ascertain what caused the interrupt. if the micro processor does not issue the interrupt within a specific time, the old data is lost and only the latest data is reflected in the interrupt flag register. in the standby mode of operati on, only the hot-key will cause th e interrupt flag to be set and the irq_n pin will be asserted. th e micro processor should then read the interrupt to know what caused the wake-up operation before proceeding with the normal data communication or asserting stby again if there is no action to be performed. upon the first read of the hot- key data, the data in the buffer is cleared. when the b4 of the above interrupt flag is set, then the p should read the address 0x0f from the rtc register space to determine if the alarm was triggered. only after determining this, the interrupt flag is cleared and the irq_n pin de-asserted. the irq_n pin will only be de-asserted once the interrupt flags have been read. the chip will continue to send the interrup t periodically (approximately every 40us) to the main host chip if the oscillator is down signifying to the host chip that the frequency is out of spec. 7.4 address setting command this command sets an address of the display memory or the address of the rtc register map. the address range from 00h-0fh represents the rtc register map. for writing data to rtc registers, initially the address comma nd is sent followed by the rtc data. 10h-14h represents the 7-segment and discrete led display correspondence. on power application, the address is set to 10h. in the auto-increment mode, when the address reached 0x14, the next ad-dress will be 0x10. !-6 byte 2: msb lsb b7-b4 = normal operation b3-b0=wake up operation 2eserved 24# watchdog timer 24# alarm 24# fail /scillator 7ake up pin ,to( or(to, 7atchdog timer 24#alarm 24# fail /scillator msb lsb 1 1 x b4b3b2b1b0
STLED325 commands doc id 17576 rev 1 51/62 7.5 display control and hotkey setting command bits b7-b6 = 10 is decoded as a display control and hotkey setting command. the subsequent bits are decoded as follows: b5 = 0: sets display control for dimming setting as shown in the table below. display control and dimming setting when b5 = 0 b3.b0: sets dimming quantity. 0000: sets pulse width to 1/16. 0001: sets pulse width to 2/16. 0010: sets pulse width to 3/16. 0011: sets pulse width to 4/16. 0100: sets pulse width to 5/16. 0101: sets pulse width to 6/16. 0110: sets pulse width to 7/16. 0111: sets pulse width to 8/16. 1000: sets pulse width to 9/16. 1001: sets pulse width to 10/16 (default and recommended) 1010: sets pulse width to 11/16. 1011: sets pulse width to 12/16. 1100: sets pulse width to 13/16. 1101: sets pulse width to 14/16. 1110: sets pulse width to 15/16. 1111: sets pulse width to 16/16. figure 19. blanking time b4: turns on/off display 1 0 b5 b4 b3 b2 b1 b0
commands STLED325 52/62 doc id 17576 rev 1 0: display off (keyscan continues) 1: display on when b5 = 1, the decoding is based on bits b1-b0 as illustrated below: b1 b0 = 01: ir hot-key configuration of adr and data. after this 3 bytes are sent which are in the form adr+data to configure the hot-key for a particular device address. a maximum of 8 hot keys can be configured from a single device address or 4 hot-keys from two device addresses and so on. if more than 24 bytes in the form of adr+data are sent, then the pointer moves back to the first adr+data location. b1 b0 = 10: fp hot-key configuration. any of the 16 keys can be configured as hot-keys. 2 bytes of key data command are sent following this command to configure the front-panel hotkeys. b4, b3 b2: reserved b1b0: 00 or 11 are treated as invalid commands and subsequent data bytes are ignored. remote control hot keys when b5 = 1 b1 b0: 01 following 8-bit is sent to indicate the address for rc and subsequent 16-bit indicates the rc hot key value itself. so a total of 3 bytes are sent for one hot-key configuration. a total of 24 bytes are re-served for rc hot key configuration. note that the customer code is programmable for the rc hotkey for both rcmm and r-step rc protocol. front panel hot keys when b5 = 1 b1 b0: 10 front panel hot keys can be configured by sending 2 bytes of key data to configure any key as hot-key from any of the 2 banks. any number of keys can be configured as hot-keys. when input key code matches any one of the predefined key codes stored in the internal ram, the STLED325 de-asserts the stby output.
STLED325 commands doc id 17576 rev 1 53/62 7.6 keyscanning and display timing figure 20. keyscanning and display timing the value is fixed by the internal clock from the oscillator. one cycle of keyscanning consists of one frame, and data of 8x2 matrices are stored in the ram. note that the keyscan is only at the end of the frame when the display is on. when the display is off, the keyscan takes place continuously. the grid/digit is turned off during the keyscan. am0416 8 v1 dig1 dig2 dig3 ----------- key scan grid outputs dign dig1 tdisp=500us seg1 seg2 seg3 segn t=1/16 of tdisp tframe=tdisp * (n+1) n = number of digits
state STLED325 54/62 doc id 17576 rev 1 8 state 8.1 default state upon power-up table below shows the default state of the STLED325 upon power-up. 8.2 initial state on power application, the 10/16-pulse width is set and the display shows the value configured in the led display ram before entering the standby mode. thus if tune is required to be shown on the led upon wake-up, then the user must write the corresponding digit and segments locations in the led display memory before going into the standby mode of operation. the value of the display changes only after user configuration. if the user wishes to display the rtc value during standby, then the user must configure the STLED325 by sending the appropriate command. if the user does not configure the STLED325 to display the rtc in standby, the led shows the same value as was written previously in the led display memory location. note that all the hot keys are disabled on power-up. only the hot-keys (fp or rc) can be detected to wake-up the system from standby condition. table 30. power-up defaults serial number func tion default state 1 display off 2 key-scan on 3ir disabled 4 display mode 8 segment/1 digit 5 display address 10h with address increment mode 6 rc protocol disabled 7 dimming 10/16 duty factor 8 hot keys (ir and fp) disabled 9 guard timer 10s
STLED325 remote control protocols doc id 17576 rev 1 55/62 9 remote control protocols contact stmicroelectronics for more information on rc protocols or refer to separate document (tbd).
application information STLED325 56/62 doc id 17576 rev 1 10 application information 10.1 power supply sequencing proper power-supply sequencing is advised for all cmos devices. it is recommended to always apply v cc before applying any signals to the input/output or control pins. 10.2 i set variation with r set the graph of i set variation with r set is shown in figure 21 . figure 21. rext versus iseg curve
STLED325 application information doc id 17576 rev 1 57/62 10.3 application diagram figure 22. application schematic resistors: rset = external resistor for current setting r1 = 1-10 ko sda external pull-up resistor r2 = 1-10 ko scl external pull-up resistor r3 = 1-10 ko irq_n external pull-up resistor r4-r5 = 10 ko external key-matrix pull-down resistors capacitors: c1 = 33 f (25 v) electrolytic c2 = 0.01-0.1f (25v) ceramic creg=0.1 uf cl1 = cl2 = 25pf diodes d1-d8 = 1n4148 supply voltage v cc = 5 v 10% am0 8 725v1 main cpu keyscan (8x2 matrix) scl sda STLED325 iset led 4-digit 7- s egment (+ dot -point) di s pl a y p a nel with s ome individ ua l led s rset key1-key2 4 seg1/ks1 -seg8/ks8 dig1-dig4 r1 c1 c2 r4 r5 d1 d2 d3 d4 d5 d6 d7 d8 gnd gnd gnd r2 ir remote control sensor ir_in irq_n stby r3 crystal (32.768khz) xi xo cl1 cl2 ready dig5 vbat wake_up mute gpio1 gpio2 vreg vcc creg
package mechanical data STLED325 58/62 doc id 17576 rev 1 11 package mechanical data in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com . ecopack is an st trademark. table 31. qfn32 (5 x 5 mm) mechanical data symbol millimeters min typ max a 0.80 0.90 1.00 a1 0 0.02 0.05 a3 0.20 b 0.18 0.25 0.30 d 4.85 5.00 5.15 d2 3.35 3.45 3.55 e 4.85 5.00 5.15 e2 3.35 3.45 3.55 e0.50 l 0.30 0.40 0.50 ddd 0.08
STLED325 package mechanical data doc id 17576 rev 1 59/62 figure 23. qfn32 package dimensions
package mechanical data STLED325 60/62 doc id 17576 rev 1 figure 24. qfn32 carrier tape
STLED325 revision history doc id 17576 rev 1 61/62 12 revision history table 32. document revision history date revision changes 27-apr-2011 1 initial release.
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